From: Tony Finch (dot@dotat.at)
Date: Sat Oct 07 2000 - 19:01:53 PDT
Eugene Leitl <eugene.leitl@lrz.uni-muenchen.de> wrote:
>
>However, on the long term this will be obsoletified by cellular
>automata hardware (see also crystalline computation,
>computronium). Here are a few quick arguments why:
Hmm. I'm not convinced. A lot of the problems with defects that you
mentioned are already being addressed by DRAM manufacturers including
spare capacity on the die along with a mechanism akin to bad block
remapping on hard disks. Like RAM, the structure of FPGAs is also very
regular so they could use the same technique.
>* as switching speed goes up, relativistic latency will start
> constaining on-die accesses to immediate vicinity
Pipelining handles this problem at the moment, albeit not in a
comprehensive way.
>* active signal propagation knows no fanout problems nor signal
> degradation (see biology)
CPUs already use amplifiers on long paths, but you don't want to stick
too many of them on your signal path because you'll make the
propagation delays much worse!
But for the longer term you are right, of course. I just hope that an
accidental off-by-one error in some grey goo doesn't cause an infinite
loop and the consequent consumption of the whole planet by nanoware :-)
Tony.
-- en oeccget g mtcaa f.a.n.finch v spdlkishrhtewe y dot@dotat.at eatp o v eiti i d. fanf@covalent.net
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