Eugene.Leitl@lrz.uni-muenchen.de wrote:
>Tony Finch wrote:
>>
>> Actually, you've pretty much reinvented the transputer here. MISC,
>> memory on chip, scale the system by adding CPUs.
>
>Not quite, there's a lot of ground Inmos hasn't even begun to cover.
>
> http://www.lrz-muenchen.de/~ui22204/.html/txt/8uliw.txt
Hmm. The T9 had MISC, instruction grouping to get multiple
instructions completed in a single cycle, MIMD on a module scale
(although not with the degree of integration you are talking about),
very high density code (stack-based, one byte per instruction for
common operations), on-chip CPU, RAM, and programmable communication
links. It doesn't have SIMD (although the FPU may have had some
support for that -- dunno) or very wide buses or WAN scalability.
7 out of 9 isn't bad. Some of the chips even worked, albeit slowly :-)
Tony.
-- f.a.n.finch fanf@covalent.net dot@dotat.at "Then they attacked a town. A small town, I'll admit. But nevertheless a town of people. People who died."
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